Feature Reveals Of Zen 3 EPYC Milan
Performance details of AMD’s next-generation Zen 3 based EPYC Milan CPUs have been revealed by Hardwareluxx. The information comes from internal AMD slides which were obtained by the publication and reveal the performance potential of AMD’s next-gen server powerhouse.
Zen 3 EPYC Milan CPUs V/S Zen 2 EPYC Rome
Shipping of AMD’s Zen 3 based EPYC Milan CPUs is planned to start later this year and is expected to continue performance leadership in the server segment. Based on the leaked information, AMD is definitely going to deliver another major breakthrough in server performance with its 3rd Gen EPYC family of processors.
According to the report, the IPC performance is increased by 15 percent by the AMD Zen 3 core architecture. However, even higher performance is expected to be delivered with a certain range of SKUs within the EPYC Milan lineup. A different approach is taken by AMD with EPYC Milan CPUs, segmenting 32 core parts that maximize the clock-throughput & the 64 core for compute-intensive workloads.
AMD EPYC Milan 20% Faster
A performance jump of around 10 to 15% is expected to be delivered by the 64 core parts over existing EPYC Rome 64 core processors. On the other hand, the 32 core parts are expected to deliver a 20% performance boost over the existing 32 core EPYC Rome parts. The leak states that higher clock rates can be achieved by AMD’s 32 core parts and below as compared to the 64 core parts. This will lead to a bigger performance jump over their predecessors as fewer cores will be able to offer higher and more stable clock speeds than the higher core parts.
Sticking to a maximum of 64 cores, AMD’s EPYC Milan CPUs will be composed of 8 chiplets. Unlike the previous generation parts, the CCX is entirely excluded from the architecture and these CCD chiplets will feature 8 Zen 3 cores. The CCD is a singular unit where each core has its own separate 1 MB L2 cache and also consists of 32 MB of L3 cache shared by all 8 cores.
As 64 core processors of AMD’s EPYC Milan CPUs will feature 8 chiplets, the 32 core parts will be composed of four chiplets. The number of chiplets could vary if AMD wants to offer 32 core parts with a higher L3 cache. This would only be possible with more than 4 chiplets.
Below you can see the configuration of various series of AMD.
The 64-Core Barrier set to broken by AMD EPYC Genoa with Zen 4 Cores
AMD officially unveiled in their latest roadmap during the EPYC Rome launch about the mystery of the AMD EPYC Genoa processors based on the Zen 4 core architecture. With a planned launch by 2022, Genoa is currently in design. It believed that Genoa lineup would bring a brand new set of features to the server landscape.
EPYC Genoa would be compatible with the new SP5 platform which brings a new socket so SP3 compatibility would exist up till EPYC Milan as announced by AMD. Support for new memory and new capabilities would also be featured by the EPYC Genoa processors. It is likely that in 2021 AMD would definitely be jumping on board the with DDR5 bandwagon. It is possible that AMD’s Ryzen and Threadripper lines would also feature support for the new memory interface as DDR5 will come up with Zen 4. It is also stated that new capabilities would be introduced on EPYC Genoa, indicating a hint at the new PCIe 5.0 protocol which would double the bandwidth of PCIe 4.0. This will offer 128 Gbps link speeds across an x16 interface.
AMD’s EPYC Genoa processors as per the reports will feature more than 64 cores & will retain SMT2. The leaked roadmap leaving DDR5 details aside, also mentions support for the latest Persistent Memory (NVDIMM-P) on the SP5 platform. With a few special variants featuring 225 Watt figures, the thermal design for Genoa will look a lot similar to existing parts with SKUs ranging from 120-240W. By the second half of 2021, it is also believed that Genoa’s successor is expected to be unveiled and we can expect the first tape out of next-generation EPYC soon.
The main features of EPYC Genoa are:
- 5nm Zen 4 cores
- SP5 Platform With New Socket
- PCIe 5.0 Support
- DDR5 Memory Support
- Launch by 2022
Genoa CPUs are expected to deliver over 2 Exaflops of Compute power when it becomes operational in 2023 which would be featured in the El Capitan supercomputer. The next-generation CDNA2 GPUs will be utilized which are solely designed for HPC workloads.